Thursday, January 3, 2019

1.3.2 (b): describe the stages of the fetch-execute cycle. Including the use of registers.




The program counter (PC) contains the address of the next instruction to be fetched.

The address is copied to the MAR (Memory Address register) via the address bus

The instruction at the address is copied into the MDR (Memory data register) temporarily.

The instruction in the MDR is then placed in the CIR ((Current instruction register) basically the current instruction being processed)

If instruction contains an address, it is placed in the MAR

The instruction is decoded and then executed

The value in the PC is then incremented, pointing for the next instruction to be fetched

This is the fetch-execute cycle as it goes in a loop

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